Vertical Semiconductor Vertical GaN Power Transistors

Organization
Vertical Semiconductor · United States
Solution Type
Ready Product / Solution
Collaboration
R&D Collaboration, Business Collaboration (Joint Venture)

1. Technology overview

Vertical Semiconductor is an MIT spinout co-founded by CEO Cynthia Liao, CTO Dr. Joshua Perozek and Prof. Tomas Palacios, building on research from MIT's Palacios Group. It develops vertical gallium nitride (GaN) power electronics for AI data centres and grid infrastructure, where lateral GaN devices do not scale well to higher voltages or currents.

In its vertical GaN transistors current flows through the device rather than along the surface, giving a single platform that scales from 40 V to 2.3 kV with higher switching frequency and lower thermal resistance. The devices are fabricated on 8-inch wafers with standard silicon CMOS processes, and the company is moving from sampling packaged devices to integrated power converter solutions. Target customers are AI data centre operators and power system makers moving to 800 VDC architectures, plus grid equipment suppliers.

2. Highlighted features & specifications

  • Vertical GaN transistors: current flows through the die for higher voltage and current scaling.
  • Wide voltage platform: one technology from 40 V to 2.3 kV.
  • 8-inch manufacturing: fabricated with standard silicon CMOS processes.
  • Data centre power: converters for 800 VDC architectures from grid to chip.
  • Grid systems: compact solid-state power systems for onsite generation and grid links.
  • Vertical GaN FinFETs: scaling on an engineered substrate for higher performance.

3. Potential application

A data centre developer in Vietnam can pilot vertical GaN power shelves to fit more AI servers within a fixed grid connection. A power supply maker serving hyperscale customers can co-develop 800 VDC converters. A grid equipment supplier can evaluate compact solid-state systems for industrial park substations.

4. Benefits

The company states up to 30% higher energy efficiency and up to 50% smaller power footprint for AI data centre racks, freeing space and power for compute. One vertical GaN platform covers 40 V to 2.3 kV, simplifying sourcing from grid to chip. Manufacturing on 8-inch wafers with standard silicon processes supports cost-effective scaling. Lower thermal resistance eases cooling in dense power shelves.

6. Other information

MIT spinout co-founded by Cynthia Liao, Joshua Perozek and Tomas Palacios. Raised an 11 million USD seed round in October 2025 led by Playground Global with JIMCO Technology Ventures, milemark capital and Japan's Shin-Etsu Chemical. Signed a letter of intent with the US Department of Commerce for 73 million USD in CHIPS funding in October 2026; the award is not yet final.

Vertical Semiconductor
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