
1. Technology overview
Ayar Labs, based in San Jose, California, makes optical interconnect for large-scale AI. Its co-packaged optics connect many GPUs across racks into one fabric, addressing the bandwidth, latency and power limits of copper links and pluggable optics.
TeraPHY is an optical I/O chiplet built with silicon photonics on standard CMOS. It offers 8 Tbps bidirectional bandwidth, 8 full-duplex optical ports with 16 WDM slices each, 10 ns latency excluding fiber, and a UCIe interface. It is paired with the SuperNova multi-wavelength light source, and partners shown include AMD, NVIDIA, MediaTek, Alchip and Wiwynn.
2. Highlighted features & specifications
- Optical bandwidth: 8 Tbps bidirectional per chiplet, with 512 Gbps per optical port.
- Low latency: 10 ns per chiplet excluding fiber time-of-flight, with BER below 1e-12.
- UCIe compliance: die-to-die interface that fits existing system-in-package designs.
- Port architecture: 8 full-duplex ports with 16 WDM transceiver slices and a configurable crossbar.
- SuperNova light source: multi-wavelength source in the ELSFP form factor paired with TeraPHY.
- Manufacturing: silicon photonics on standard CMOS processes.
3. Potential application
An accelerator or switch chip designer can integrate TeraPHY chiplets for rack-scale scale-up fabrics. A server maker can build co-packaged optics systems, as with Wiwynn. A packaging house can evaluate optical chiplets in multi-chip modules for AI data centres.
4. Benefits
Chip and system makers can add multi-terabit optical bandwidth to an existing package without changing the packaging flow. The company claims 5x-10x higher bandwidth, 10x lower latency and 4x-8x better power efficiency than pluggable optics with electrical SerDes. Reach extends from millimetres to kilometres, and no forward error correction is required.
5. Market trends & opportunities
AI clusters are limited by interconnect bandwidth and power as models grow, driving the move from copper and pluggable optics to co-packaged optics. UCIe lets chiplets from different vendors interoperate. Vietnamese and Southeast Asian data centre builders and packaging or OSAT partners may meet this technology through accelerator and server vendors.
6. Other information
Headquartered at 695 River Oaks Parkway, San Jose, California. Mark Wade is CEO and co-founder. Expanded 2026 funding to USD 650 million, with a further USD 150 million extension reported in September 2026. Joined the NVIDIA NVLink Fusion ecosystem. Roadmap details are available under NDA.
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