
1. Technology overview
proteanTecs provides deep-data health and performance management for electronics, from silicon to system to field deployment. Press releases are datelined Haifa, Israel and Hsinchu, Taiwan. Its platform embeds Agents and Sensors in chips, collects data through a decision engine and applies software analytics.
In August 2026 the company unveiled solutions for multi-die systems with per-chiplet visibility from pre-assembly screening through SiP production and field operation. They cover shift-left chiplet quality assurance, pre-to-post packaging correlation, synchronized inter-chiplet analysis and multi-stream analytics, with partners such as Amkor, GUC and MegaChips.
2. Highlighted features & specifications
- Shift-left chiplet QA: Screens chiplet quality before assembly.
- Pre-to-post packaging correlation: Links wafer-level and package-level data.
- Inter-chiplet analysis: Synchronized view of data across dies in one package.
- Multi-stream analytics: Combines several data streams into health and performance insights.
- Embedded Agents: Monitoring in chiplets, HBM base dies and PHY interfaces.
- Package-agnostic support: Works across 2.5D and 3D SiP architectures.
3. Potential application
Fabless and chiplet designers can use it to screen known-good-die before sending them to an OSAT in Vietnam or Southeast Asia.
Packaging houses can correlate pre- and post-assembly data to find the step that degrades die-to-die links.
4. Benefits
Per-chiplet visibility into thermal gradients, power and clock noise and structural stress after integration.
Vendor-claimed DPPM reduction beyond best-known methods at wafer sort and higher confidence in known-good-die and known-good-stack quality.
Better compound yield across multi-die architectures.
In-field thermal, power and timing-margin awareness for runtime optimisation.
5. Market trends & opportunities
Multi-die AI packages raise the cost of a single bad chiplet, so telemetry before and after assembly gains value. OSAT and packaging capacity expanding in Vietnam and Southeast Asia increases demand for test data that connects wafer sort, packaging and field reliability.
6. Other information
Partners shown on the site include TSMC, Siemens, Intel, Arm, Samsung, GUC, Teradyne, Advantest and Cadence. Releases in 2026: strategic investment by TOPPAN's venture arm (March), collaboration with MegaChips (September) and expanded collaboration with GUC (September 22).
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